Senior System Performance and Architecture Engineer, Silicon

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 5 years of experience in computer or chip architecture, performance, or software development for Compute IPs.
• Experience analyzing workloads on simulation models or hardware devices.
• Experience with general computer architecture, TPU/GPU architecture, or workload performance analysis.

• Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
• Experience with one or more general purpose programming languages including C/C++ or Python.
• Experience in performance and power optimization.
  
• Knowledge in one or more of these areas: GPU, TPU, or ISP hardware architecture.
• Knowledge in GPU or other vector program optimization, Generative AI model architectures.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Develop models, analyze and project power and performance of compute-centric hardware IP blocks (Compute IPs) on a mobile SoC, including GPU, TPU, and ISP.
• Study the behavior of various compute, gaming, and AI workloads executing on the SoC, identify issues and opportunities for hardware and software co-optimization.
• Propose improvements in the hardware architecture of the Compute IPs or SoC-level as well as in the compiler, runtime, or application software.
• Work with hardware and software teams to align on the architecture requirement and definition of one or more Compute IPs.