RTL Design Engineer - Accelerator & DPU

About the team:
This team is at the forefront of technological innovation, specializing in the design, development, and production of CPUs for ByteDance data center servers. Leveraging a team of highly skilled engineers, researchers, and experts, the unit focuses on creating high-performance, energy-efficient, and reliable chips that power a wide range of electronic devices and systems.

Responsibilities
- Participates in the definition of architecture and microarchitecture features of the block being designed
- Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence
- Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation
- Reviews the verification plan and implementation to ensure design features are verified correctly
- Resolves and implements corrective measures for failing RTL tests to ensure correctness of features
- Works with SoC group to integrate and validate IPs at the SoC level
- Drives quality assurance compliance for smooth IP/SoC handoff
- Excellent communication and documentation skills
- Mentoring team members