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ASIC Engineer, EDA Infrastructure
Meta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure ASIC organization. EDA Infrastructure Engineers are individuals with experience in EDA flow and methodology, CAD/automation and ASIC infrastructure to build efficient System on Chip (SoC) and IP for data center applications.ASIC Engineer, EDA Infrastructure Responsibilities
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
- Front-end implementation flow development and support
- Internal tools development and automation to help improve productivity across ASIC design cycles including but not limited to RTL generation tool, memory selection automation, register generation, file list generation
- Manage the internal EDA license requests, installation and license forecast as well as EDA tool installation and maintenance
- Work with internal infrastructure team on compute grid, storage management and job scheduling architectures, efficiency and maintenance
- Work with internal infrastructure team on adapting Meta infrastructure to ASIC design solutions, including but not limited to Source Control Management, Continuous Integration, data management, and reporting
- RTL-to-GDS flow development and support
- Physical design implementation flow development and support
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 6+ years of experience with EDA tools and scripting languages (Python, Tcl) used to build tools and flows for complex environments
- Knowledge of front-end and back-end ASIC tools and flows
- Experience with RTL design using SystemVerilog or other HDL
- Experience with ASIC EDA infrastructure (compute, storage, job scheduling) management, maintenance and support
- Experience with developing and supporting solutions for ASIC design environment and infrastructure
- Experience with communicating across functional internal teams and with vendors
- Successful candidates must remain in role in the same team in India for a minimum period of 24 months before being eligible for transfer to another role, team or location
- 8+ years of experience with Electronic Design Automation tools and scripting languages (Python, Tcl) used to build tools and flows for complex environments
- Experience setting up Electronic Design Automation (EDA) infrastructure from scratch
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.